1. Field of the Invention
The present invention relates to digital reset signal generator circuits, and in particular, to digital brownout reset signal generator circuits for resetting digital circuits under power brownout conditions.
2. Description of the Related Art
Most digital systems, such as microprocessors or microcontrollers, include a means by which they can be reset under various, specific conditions. For example, it is typically desirable to reset a microprocessor upon power up, i.e. initial application of DC power, to delay operation of the microprocessor until its associated clock circuitry has started running and becomes stabilized and the processor has initialized its internal registers, memory address pointers and external connections (e.g. tri-state outputs) to predetermined states (e.g. logical high or low, or "tri-state"). Another situation in which a reset is typically desired is under brownout conditions, i.e. when DC voltage to the microprocessor has fallen below a minimum value deemed sufficient for reliable operation.
The means by which microprocessors are typically reset under power up or brownout conditions involves an externally accessible connection, e.g. a reset pin, for delivering a reset signal to the microprocessor. This is typically done by driving the reset pin to a logical zero for a period of time long enough to ensure that the microprocessor is reset and its clock is running. This is usually accomplished using an external resistor-capacitor network connected to the reset pin. Other techniques involve the use of a timer circuit such as a monostable multivibrator ("one-shot").
A number of problems are associated with these reset techniques. The use of external components, such as discrete resistors and capacitors, introduce added expense and require a relatively large amount of space, due to their physical sizes, as compared to that required by a microprocessor integrated circuit. Precise or consistent time delays or durations for the reset signal can be difficult to achieve due to individual component performance tolerances of the discrete external components or integrated circuits. Varying the time delays or durations for the reset signal requires the physical replacement of at least one of the discrete external components. Further, such "dumb" resetting, i.e. with no knowledge of the true status of the clock signal, can allow the microprocessor to exit reset and begin operation with a faulty or non-existent clock signal.